FormFactor's FRT MicroProf PT
Semiconductor test and measurement supplier FormFactor has unveiled its latest semiconductor metrology and inspection tool, the FRT MicroProf PT. This latest launch joins FormFactor’s Advanced Packaging metrology product family, with a host of new benefits.
Key information:
- The FRT MicroProf PT combines metrology and defect inspection applications into one tool.
- FormFactor's latest launch supports heterogeneous integration of chiplets used in advanced package technologies, like fan-out panel-level packaging.
- The semiconductor metrology and inspection tool is said to give users greater flexibility and can help companies reduce costs.
The new FRT MicroProf PT can inspect rectangular panels up to 600mm containing 4-5X more dies compared to a 300mm wafer. FormFactor’s latest product features a multi-sensor setup including topography, film thickness, and field-of-view with hybrid software evaluation. It can also be fully integrated into factory floor automation with SECS/GEM protocols.
The new system can handle substrates either a few millimetres thick to 200µm, whether they are organic or glass, while the film thickness measures from the micron range through to tens of nanometres.
“Innovation in advanced packaging is rapidly advancing process capability, with large-format panel substrates providing an important cost-reduction trajectory,” said Thomas Fries, Vice President and General Manager of FormFactor’s Emerging Growth Business Unit. “The multi-sensor MicroProf PT gives our customers the flexibility to use the tool in both development and production of these new processes on cost-effective panels.”
Additionally, the semiconductor test and measurement supplier’s latest product features hybrid metrology and full automation capabilities, which will allow a single system to perform defect detection and multiple types of 3D measurements on large format panels. Automation is supported by two loaders for panel FOUPS (for panels up to 600mm x 600mm). These capabilities will support the heterogenous integration of chiplets used in advanced package technologies, like FoPLP.
FoPLP stacks several semiconductor dies into a single heterogeneous package. It achieves this by connecting elements like interposers, microbumps, and TSVs (through-silicon vias).